CMP by controlling polish temperature
US8172641B2 · kind B2 · utility
18Cited by
13References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2008 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Mar 6, 2031 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B55/02
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method for manufacturing integrated circuits on a wafer includes providing a facility-supplied room temperature solution; controlling the temperature of the facility-supplied room temperature solution to a desired temperature set point to generate a rinse solution; and rinsing a polishing pad using the rinse solution. The wafer is then polished by means of a chemical mechanical polishing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.