Structure of a pHEMT transistor capable of nanosecond switching

US8174050B2 · kind B2 · utility

Assignee

• MACOM Technology Solutions Holdings, Inc. · US

Inventors

• Timothy E. Boles · Willowdale, US
• Andrew K. Freeston · Windham, US
• Costas D. Varmazis · Chelmsford, US

Key dates

• Filing date: Dec 21, 2009
• Grant date: May 8, 2012
• Expiry date: Jul 29, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/852

Abstract

A method for fabricating a transistor and the resulting transistor is disclosed. The method generally includes steps (A) to (E). Step (A) may form a high mobility layer. The high mobility layer is generally configured to carry a two-dimensional electron gas. Step (B) may form a planar layer on the high mobility layer. Step (C) may form a barrier layer on the planar layer. Step (D) may form a doped layer on the barrier layer. The doped layer is generally a low bandgap III-V semiconductor. Step (E) may form a gate in contact with the doped layer. The gate may be separated from both a source and a drain by corresponding ungated recess regions. The high mobility layer, the planar layer, the barrier layer, the doped layer, the source, the gate and the drain are generally configured as a pseudomorphic high electron mobility transistor.