Power factor correction integrated circuit with critical conduction mode
US8174855B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2006 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Oct 12, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power factor correction integrated circuit housed in an integrated circuit package for controlling a boost converter circuit having an input inductor coupled in series with a boost rectifier between a rectified AC line input voltage and a DC bus voltage, on a DC bus, the rectified AC line input voltage provided by a rectifier coupled to an AC line input voltage to be power factor corrected. The integrated circuit including a first input circuit sensing the DC bus voltage; a second input circuit sensing current through the inductor and determining when the current through the inductor discharges to substantially zero current, a power switch coupled between a common connection of the inductor and boost rectifier and a return line of the DC bus for allowing the inductor to be charged by current from the rectified AC line input voltage when the power switch is turned on; and a control circuit having inputs coupled to outputs from the first and second input circuits to control the On-Time of the power switch to regulate the DC bus voltage to a desired voltage level and to achieve power factor correction of the AC line input voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.