Variable redundancy reed-solomon encoder
US8176397B2 · kind B2 · utility
6Cited by
9References
14Claims
0Family size
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Key dates
| Filing date | Sep 17, 2008 |
| Grant date | May 8, 2012 |
| Priority date | — |
| Expiry date | Mar 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6516
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fixed length Reed-Solomon encoder is configured to produce a first fixed number of redundant symbols. The fixed length Reed-Solomon encoder is configured with an encoding polynomial that is fixed. A symbol preprocessor maps each input data symbol to a transformed input data symbol. A symbol postprocessor maps a second fixed number of redundant symbols output from the fixed length Reed-Solomon encoder to a set of redundant symbols. The second fixed number of redundant symbols is less than the first fixed number of redundant symbols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.