Sub-threshold CMOS temperature detector
US8177426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2009 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Nov 12, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01K3/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A CMOS temperature detection circuit includes a start-up circuit for generating a start-up voltage (VN), and a proportional to absolute temperature (PTAT) current generator coupled to the start-up circuit for generating a PTAT current. The start-up voltage turns on the PTAT current generator, and the PTAT current generator uses the sub-threshold characteristics of CMOS to generate the PTAT current. A PTAT voltage generator coupled to the PTAT current generator receives the PTAT current and generates a PTAT voltage and an inverse PTAT voltage (VBE). A comparator circuit coupled to the voltage generator compares the inverse PTAT voltage to first and second alarm limits, which are defined using the generated PTAT voltage, and generates an alarm signal based on the comparison results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.