Pattern forming method, manufacturing method of semiconductor device, and template manufacturing method
US8178366B2 · kind B2 · utility
2Cited by
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Key dates
| Filing date | Jan 27, 2011 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Jan 27, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/887
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
In the pattern forming method according to the embodiment, second templates are manufactured by an imprint technology using first templates manufactured by applying a predetermined misalignment distribution for each shot on a first substrate by an exposure apparatus. Then, an upper-layer-side pattern is formed by an imprint technology using a second template in which an inter-layer misalignment amount between a lower-layer-side pattern already formed above a second substrate and the upper-layer-side pattern to be formed above the second substrate becomes equal to or lower than a predetermined reference value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.