Semiconductor device package with die receiving through-hole and dual build-up layers over both side-surfaces for WLP and method of the same
US8178964B2 · kind B2 · utility
47Cited by
2References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 30, 2007 |
| Grant date | May 15, 2012 |
| Priority date | — |
| Expiry date | Apr 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure of a semiconductor device package having a substrate with a die receiving through hole, a connecting through hole structure and a contact pad. A die is disposed within the die receiving through hole. A surrounding material is formed under the die and filled in the gap between the die and the sidewall of the die receiving though hole. Dielectric layers are formed on the both side surface of the die and the substrate. Re-distribution layers (RDL) are formed on the dielectric layers and coupled to the contact pads. Protection layers are formed over the RDLs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.