Patent · US Active

Static randon access memory cell

US8183636B2 · kind B2 · utility

4Cited by

4References

6Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Joerg Berthold · Munich, DE
Christian Pacha · Birkenfeld, DE
Klaus Arnim Von · Munich, DE

Key dates

Filing date	Mar 28, 2011
Grant date	May 22, 2012
Priority date	—
Expiry date	Mar 28, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/40
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

One or more embodiments relate to a static random access memory cell comprising: a first inverter including a first n-channel pull-down transistor coupled between a first node and a ground voltage; a second inverter including a second n-channel pull-down transistor coupled between a second node and the ground voltage; a first n-channel access transistor coupled between a first bit line and the first node of the first inverter, a fin of the first n-channel access transistor having a lower charge carrier mobility than a fin of the first n-channel pull-down transistor; and a second n-channel access transistor coupled between a second bit line and the second node of the second inverter, a fin of the second n-channel access transistor having a lower charge carrier mobility than a fin of the second n-channel pull-down transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.