Method for matching timing on high fanout signal paths using routing guides
US8185860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2011 |
| Grant date | May 22, 2012 |
| Priority date | — |
| Expiry date | Aug 9, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, algorithm, software, architecture and/or system for routing signal paths or connections between circuit blocks in a circuit design is disclosed. In one embodiment, a method of routing can include: (i) determining a signal path between at least three circuit blocks; (ii) placing a routing guide; and (iii) routing the signal path through the routing guide such that a timing of a signal along the signal path at two or more the circuit blocks is substantially matched. The circuit blocks can include standard cells configured to implement a logic or timing function, other components, and/or integrated circuits, for example. The routing guide can include a splitter configured to branch the signal path into at least two associated segments. Embodiments of the present invention can advantageously improve signal timing for high fanout signal paths between circuit blocks in an automated place-and-route flow.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.