Input/output package architectures

US8188594B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Sanka Ganesan · Chandler, US
• Kemal Aygun · Tempe, US
• Chandrashekhar Ramaswamy · Chandler, US
• Eric Palmer · Tempe, US
• Henning Braunisch · Chandler, US

Key dates

• Filing date: Oct 1, 2009
• Grant date: May 29, 2012
• Expiry date: Feb 20, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/19032
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.