Memory device and method thereof
US8189410B1 · kind B1 · utility
7Cited by
13References
2Claims
0Family size
Inventor
Key dates
| Filing date | Apr 27, 2010 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Dec 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first input of a sense amplifier is connected to a first bitline, a second input of the sense amplifier is connected to a second bitline, a third input of the sense amplifier is coupled to a third bitline. The sense amplifier provides at an output an indicator of a storage state of a memory cell connected to the first bitline based upon information provided to the sense amplifier via the first, second, and third bitlines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.