Method and system for time to digital conversion with calibration and correction loops
US8193963B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2010 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Dec 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04F10/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods and apparatuses for time to digital conversion (TDC) are disclosed. A timing circuit comprises a TDC circuit, a calibration module, and a correction module. The TDC circuit is configured to provide a timing signal indicative of a timing difference between edges of a periodic reference clock signal and a variable feedback signal. The TDC circuit is also configured to provide a delay signal that is variably delayed relative to the reference clock signal. The calibration module is configured to provide a calibration signal to increase and decrease a total delay of the TDC circuit based on a time delay of the calibration signal plus a time delay of a correction signal. The correction module, which is configured to receive the timing signal and provide the correction signal, minimizes harmonic spurs in a frequency response of the timing signal by operating at a frequency of the reference clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.