Patent · US Active

Methods of fabricating normally-off semiconductor devices

US8198178B2 · kind B2 · utility

12Cited by
3References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 1, 2011
Grant dateJun 12, 2012
Priority date
Expiry dateJul 1, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/8503

Abstract

Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.