Multi-media processor cache with cache line locking and unlocking
US8200917B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2007 |
| Grant date | Jun 12, 2012 |
| Priority date | — |
| Expiry date | Mar 31, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to techniques for locking and unlocking cache lines in a cache included within a multi-media processor that performs read-modify-write functions using batch read and write requests for data stored in either an external memory or an embedded memory. The techniques may comprise receiving a read request in a batch of read requests for data included in a section of a cache line and setting a lock bit associated with the section in response to the read request. When the lock bit is set, additional read requests in the batch of read requests are unable to access data in that section of the cache line. The lock bit may be unset in response to a write request in a batch of write requests to update the data previously read out from that section of the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.