FinFET with two independent gates and method for fabricating the same

US8203182B2 · kind B2 · utility

Assignees

• NXP B.V. · NL
• STMicroelectronics (Crolles 2) SAS · FR

Inventors

• Markus Müller · Wegenstetten, CH
• Philippe Coronel · Barraux, FR

Key dates

• Filing date: Mar 6, 2008
• Grant date: Jun 19, 2012
• Expiry date: Jun 1, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6215

Abstract

A FinFET (100) comprises a fin-shaped layer-section (116) of a single-crystalline active semiconductor layer (104) extending on an insulating substrate layer (106) along a longitudinal fin direction between, a source layer-section (122), and a drain layer-section (124) of the single-crystalline active semiconductor layer (104). Furthermore, two separate gate-electrode layers (138.1, 138.2) are provided, which do not form sections of the single-crystalline active semiconductor layer, each of the gate-electrode layers facing one of the opposite side faces of the fin-shaped layer-section (116). Each gate-electrode layer is connected with a respective separate gate contact (154, 156). The gate-electrode layers, as seen in a cross-sectional view of a plane that is perpendicular to the longitudinal fin-direction, are arranged on the substrate layer (106) between the respective side face of the fin-shaped layer section and a respective contact-post layer section (118, 120) of the single-crystalline semiconductor layer (104).