Efficient 2-D and 3-D graphics processing
US8203564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2007 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Sep 17, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/363
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for supporting both 2-D and 3-D graphics are described. A graphics processing unit (GPU) may perform 3-D graphics processing in accordance with a 3-D graphics pipeline to render 3-D images and may also perform 2-D graphics processing in accordance with a 2-D graphics pipeline to render 2-D images. Each stage of the 2-D graphics pipeline may be mapped to at least one stage of the 3-D graphics pipeline. For example, a clipping, masking and scissoring stage in 2-D graphics may be mapped to a depth test stage in 3-D graphics. Coverage values for pixels within paths in 2-D graphics may be determined using rasterization and depth test stages in 3-D graphics. A paint generation stage and an image interpolation stage in 2-D graphics may be mapped to a fragment shader stage in 3-D graphics. A blending stage in 2-D graphics may be mapped to a blending stage in 3-D graphics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.