Master slave interface
US8204167B2 · kind B2 · utility
1Cited by
3References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 21, 2008 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Dec 5, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Implementations related to systems, devices, and methods that make use of a master slave arrangement are described. In some implementations, a master device is configured to generate a clock signal and a slave device is coupled to the master device and is configured to receive the clock signal. The clock signal may control data behavior associated with the master device and the slave device. Additionally, the master device may have a power consumption rate that is lower than the power consumption rate of the slave device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.