Generating variation-aware library data with efficient device mismatch characterization
US8204730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2008 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Apr 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method of generating variation-aware library data for statistical static timing analysis (SSTA), a “synthetic” Gaussian variable can be used to represent all instances of one or more mismatch variations in all devices (e.g. transistors), thereby capturing the effect on at least one timing property (e.g. delay or slew). By modeling device mismatch with synthetic random variables, the variation behavior (in terms of the distribution of delay, slew, constraint, etc.) can be interpreted as the outcomes of process variations instead of modeling the variation sources (e.g. transistor shape variations, variations in dopant atom density, and irregularity of edges).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.