Patent · US Active

Method for fabricating a semiconductor device

US8207043B2 · kind B2 · utility

3Cited by
8References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 28, 2009
Grant dateJun 26, 2012
Priority date
Expiry dateDec 29, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/021
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for making a semiconductor MOS device is provided. A gate structure is formed on a substrate. A source and a drain are formed in the substrate on both sides of the gate structure. The substrate is then subjected to a pre-amorphization implant (PAI) process. A transitional stress layer is then formed on the substrate. Thereafter, a laser anneal with a first temperature is performed. After the laser anneal, a rapid thermal process is performed with a second temperature that is lower than the first temperature. Subsequently, the transitional stress layer is removed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.