Nitride semiconductor structure and method of making same
US8212287B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 18, 2009 |
| Grant date | Jul 3, 2012 |
| Priority date | — |
| Expiry date | Nov 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02647
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure method for producing same provides suppressed lattice defects when epitaxially forming nitride layers over non-c-plane oriented layers, such as a semi-polar oriented template layer or substrate. A patterned mask with “window” openings, or trenches formed in the substrate with appropriate vertical dimensions, such as the product of the window width times the cotangent of the angle between the surface normal and the c-axis direction, provides significant blocking of all diagonally running defects during growth. In addition, inclined posts of appropriate height and spacing provide a blocking barrier to vertically running defects is created. When used in conjunction with the aforementioned aspects of mask windows or trenches, the post structure provides sign0ificant blocking of both vertically and diagonally running defects during growth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.