Methods and systems to align wafer signatures
US8219351B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2009 |
| Grant date | Jul 10, 2012 |
| Priority date | — |
| Expiry date | Aug 27, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
One embodiment relates to a computer method for aligning wafers processed in a semiconductor fabrication facility. In the method, a first arrangement of dies having a common functionality level is identified on a first wafer. A first alignment signature is assigned to the first wafer based on the first arrangement. A second arrangement of dies having the common functionality level is identified on a second wafer. A second alignment signature is assigned to the second wafer based on the second arrangement. The first alignment signature is compared to the second alignment signature, and the first and second wafers are selectively aligned based on a result of the comparison. Other systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.