Decimal floating-pointing quantum exception detection
US8219605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2010 |
| Grant date | Jul 10, 2012 |
| Priority date | — |
| Expiry date | Jan 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/4911
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for detecting decimal floating point data processing exceptions. A processor accepts at least one decimal floating point operand and performs a decimal floating point operation on the at least one decimal floating point operand to produce a decimal floating point result. A determination is made as to whether the decimal floating point result fails to maintain a preferred quantum. The preferred quantum indicates a value represented by a least significant digit of a significand of the decimal floating point result. An output is provided, in response to the determining that the decimal floating point result fails to maintain the preferred quantum, indicating an occurrence of a quantum exception. A maskable exception can be generated that is immediately trapped or later detected to control conditional processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.