Method for fabricating hole pattern
US8222152B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 5, 2010 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Jan 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a hole pattern includes forming a first hard mask layer over an etch target layer, forming a second hard mask pattern over the first hard mask layer, which are patterned to be a line type in a first direction and have a selective etch ratio to the first hard mask layer, forming a third hard mask layer over the first hard mask layer to bury a space between adjacent ones of the second hard mask pattern, forming a photoresist pattern over the third hard mask layer, which is patterned to be a line type in a second direction; etching the third hard mask layer using the photoresist pattern to form a third hard mask pattern, removing the photoresist pattern, and etching the first hard mask layer using the second and third hard mask patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.