Process for manufacturing a copper compatible chalcogenide phase change memory element and corresponding phase change memory element
US8222627B2 · kind B2 · utility
2Cited by
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34Claims
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Key dates
| Filing date | Jul 16, 2008 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Jan 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
A copper-diffusion plug 21 is provided within a pore in dielectric layer over a copper signal line. By positioning the plug below a chalcogenide region, the plug is effective to block copper diffusion upwardly into the pore and into the chalcogenide region and thus to avoid adversely affecting the electrical characteristics of the chalcogenide region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.