Switched-capacitor circuit having a capacitor array circuit, and analog-to-digital converter using said switched-capacitor circuit
US8223058B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 29, 2010 |
| Grant date | Jul 17, 2012 |
| Priority date | — |
| Expiry date | Sep 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/802
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A capacitor array circuit receives a plurality of input signals, generate a single output signal by combining the plurality of input signals, and output the single output signal. A comparator receives the output signal of the capacitor array circuit. A current source, which is disposed between a predetermined fixed voltage source and an output terminal of the switched-capacitor circuit, supplies the current to the output terminal until the output signal of the comparator changes. A plurality of input capacitors in the capacitor array circuit receives a plurality of input signals in parallel with each other. At least one additional regulating capacitor in the capacitor array circuit store the charge to compensate for an offset component caused by the delay in the comparator. The respective output terminals of the plurality of input capacitors and the at least one additional regulating capacitor are combined into one.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.