Integrated circuit packaging system with encapsulant containment and method of manufacture thereof
US8227903B2 · kind B2 · utility
0Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2010 |
| Grant date | Jul 24, 2012 |
| Priority date | — |
| Expiry date | Feb 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming layers having non-horizontal strip patterns and non-vertical strip patterns over the substrate; mounting an integrated circuit device on the substrate adjacent the non-horizontal strip patterns and the non-vertical strip patterns; and applying an encapsulation over the integrated circuit device, the encapsulation restricted by the layers to prevent the encapsulation from reaching an edge of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.