Patent · US Active

Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units

US8229989B2 · kind B2 · utility

14Cited by

1References

4Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Sang Hoo Dhong · San Jose, US
Harm Peter Hofstee · Austin, US
Christian Jacobi · West Park, US
Silvia M. Mueller · Altdorf, DE
Hwa-Joon Oh · Austin, US

Key dates

Filing date	Sep 26, 2008
Grant date	Jul 24, 2012
Priority date	—
Expiry date	May 25, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F2207/3828
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for controlling rounding modes in a single instruction multiple data (SIMD) floating-point unit is disclosed. The SIMD floating-point unit includes a floating-point status-and-control register (FPSCR) having a first rounding mode bit field and a second rounding mode bit field. The SIMD floating-point unit also includes means for generating a first slice and a second slice. During a floating-point operation, the SIMD floating-point unit concurrently performs a first rounding operation on the first slice and a second rounding operation on the second slice according to a bit in the first rounding mode bit field and a bit in the second rounding mode bit field within the FPSCR, respectively.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.