Process and apparatus for wafer-level flip-chip assembly
US8232183B2 · kind B2 · utility
0Cited by
51References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2007 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Jun 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit structure is provided. The method includes providing an interposer wafer; mounting the interposer wafer onto a handling wafer; thinning a backside of the interposer wafer; removing the handling wafer from the interposer wafer after the step of thinning; securing the interposer wafer on a fixture; and bonding a die on the interposer wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.