Semiconductor device manufacturing method
US8232191B2 · kind B2 · utility
6Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2010 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Aug 13, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/938
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device including forming a gate insulating film and a gate electrode over a Si substrate; forming a recess in the Si substrate at both sides of the gate electrode; forming a first Si layer including Ge in the recess; forming an interlayer over the first Si layer; forming a second Si layer including Ge over the interlayer; wherein the interlayer is composed of Si or Si including Ge, and a Ge concentration of the interlayer is less than a Ge concentration of the first Si layer and a Ge concentration of the second Si layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.