Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
US8233308B2 · kind B2 · utility
78Cited by
60References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2007 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Jan 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second conductor above the diode and the reversible resistance-switching element. Numerous other aspects are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.