Conductive organic non-volatile memory device with nanocrystals embedded in an amorphous barrier layer
US8233313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2011 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Nov 1, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a plurality of unit cells. Each unit cell includes lower and upper electrodes over a substrate, a conductive organic material layer between the lower and the upper electrodes, and a nanocrystal layer located within the conductive organic material layer, wherein the nanocrystal layer includes a plurality of nanocrystals surrounded by an amorphous barrier. The unit cell receives a plurality of voltage ranges to perform a plurality of operations. A read operation is performed when an input voltage is in a first voltage range. A first write operation is performed when the input voltage is in a second voltage range higher than the first voltage range. A second write operation is performed when the input voltage is in a third voltage range higher than the second voltage range. An erase operation is performed when the input voltage is higher than the third voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.