Communication between internal and external processors
US8234460B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 4, 2009 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Oct 1, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods of operating a memory device, and methods of arbitrating access to a memory array in a memory device having an internal processor are provided. In one or more embodiments, conflicts in accessing the memory array are reduced by interfacing an external processor, such as a memory controller, with the internal processor, which could be an embedded ALU, through a control interface. The external processor can control access to the memory array, and the internal processor can send signals to the external processor to request access to the memory array. The signals may also request a particular bank in the memory array. In different embodiments, the external processor and the internal processor communicate via the control interface or a standard memory interface to grant access to the memory array, or to a particular bank in the memory array, for example.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.