Multi-threaded global routing
US8234614B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2008 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Apr 2, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is described for routing a semiconductor chip's global nets. The method includes identifying a subset of the global nets and routing the subset of global nets using multiple threads, where, each of the global nets within the subset are routed by one of the threads in isolation of the subset's other global nets. The method further includes identifying a second subset of the global nets and routing the second subset of global nets using the multiple threads, where, each of the global nets within the second subset are routed by one of the threads in isolation of the second subset's other global nets but in respect of the routes of first subset of global nets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.