Transistor and method for fabricating the same

US8236696B2 · kind B2 · utility

Assignee

• SK hynix Inc. · KR

Inventor

• Jun-Hee Cho · Yongsan-gu, KR

Key dates

• Filing date: Dec 27, 2007
• Grant date: Aug 7, 2012
• Expiry date: Dec 27, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6212

Abstract

A method for fabricating a semiconductor device to enlarge a channel region is provided. The channel region is enlarged due to having pillar shaped sidewalls of a transistor. The transistor includes a fin active region vertically protruding on a substrate, an isolation layer enclosing a lower portion of the fin active region, and a gate electrode crossing the fin active region and covering a portion of the fin active region. An isolation layer is formed enclosing a lower portion of the fin active region and the isolation layer under the spacers is partially removed to expose a portion of the sidewalls of the fin active region. Subsequently, dry etching is performed to form the sidewalls having a pillar/neck.