Method of making routable layout pattern using congestion table
US8239807B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2010 |
| Grant date | Aug 7, 2012 |
| Priority date | — |
| Expiry date | Jan 5, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for generating a standard cell layout pattern for standard cell placement in an integrated circuit uses a congestion map. First, congestion zones are identified in a congestion map generated by an Electronic Design Automation (EDA) application. Next, routing tracks data corresponding to bounding boxes belonging to the congestion zones are used to calculate values of average vertical and horizontal congestion. Subsequently, a value of modified standard cell density is calculated based on the values of average vertical and horizontal congestion, and an unmodified standard cell density. The dimensions of a layout pattern unit are calculated using the value of the modified standard cell density and the width of standard cells. Various layout pattern units then are placed adjacent to one another to form a standard cell layout pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.