Integration of low and high voltage CMOS devices
US8247280B2 · kind B2 · utility
5Cited by
13References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2009 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Mar 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0156
Abstract
A method of fabricating a semiconductor device is provided that includes providing a semiconductor substrate having a first portion and a second portion, forming a first transistor in the first portion of the substrate, the first transistor being operable at a first voltage, and forming a second transistor in the second portion of the substrate, the second transistor being operable at a second voltage greater than the first voltage. The formation of the second transistor includes forming an extended feature of the second transistor with a photomask that is used to adjust a threshold voltage of the first transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.