Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode
US8247840B2 · kind B2 · utility
1Cited by
74References
18Claims
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Key dates
| Filing date | Jan 5, 2009 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Dec 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Use of a forward biased diode to reduce leakage current of transistors implemented on silicon on insulator (SOI) is a particular challenge due to the difficulty of achieving effective contact with the region beneath the gate of the transistor. An improved implementation in SOI gate fingers that reach under the source through tunnels that are contacted with a region outside the transistor. A further embodiment uses drain extension implants to provide good channel connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.