Patent · US Active

Operating system virtual memory management for hardware transactional memory

US8250331B2 · kind B2 · utility

22Cited by
34References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 26, 2009
Grant dateAug 21, 2012
Priority date
Expiry dateNov 1, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0815
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Operating system virtual memory management for hardware transactional memory. A method may be performed in a computing environment where an application running on a first hardware thread has been in a hardware transaction, with transactional memory hardware state in cache entries correlated by memory hardware when data is read from or written to data cache entries. The data cache entries are correlated to physical addresses in a first physical page mapped from a first virtual page in a virtual memory page table. The method includes an operating system deciding to unmap the first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.