Patent · US Active

Fabrication of a memory with two self-aligned independent gates

US8252702B2 · kind B2 · utility

2Cited by

6References

12Claims

0Family size

Assignees

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE · FR

Inventors

Gabriel Molas · Grenoble, FR
Thierry Baron · Pessac, FR

Key dates

Filing date	Apr 21, 2011
Grant date	Aug 28, 2012
Priority date	—
Expiry date	Apr 21, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/017

Abstract

A method for making a micro-electronic non-volatile memory device provided with transistors having gates placed side by side, the method comprising the steps of:

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.