Semiconductor module arrangement and method

US8253237B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Peter Kanschat · Soest, DE
• Thilo Stolze · Arnsberg, DE

Key dates

• Filing date: Aug 28, 2007
• Grant date: Aug 28, 2012
• Expiry date: May 24, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A power semiconductor arrangement and method is disclosed. One embodiment provides a power semiconductor module. An insulator is arranged between the module and a cooling element, increasing clearances between the power semiconductor module and the cooling element.