Anti-fuse element
US8254198B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 3, 2007 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Mar 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Programmable anti-fuse circuitry including at least one anti-fuse cell having a first anti-fuse device coupled between a supply voltage and a first node and a second anti-fuse device coupled between the first node and a ground voltage, and control logic coupled to the first node and arranged to generate a programming voltage having one of at least a first voltage level for breaking-down the first anti-fuse device but not the second anti-fuse device and coupling the first node to the supply voltage; and a second voltage level for breaking-down the second anti-fuse device but not the first anti-fuse device and coupling the first node to the ground voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.