Patent · US Active

Embedded parity coding for data storage

US8255764B1 · kind B1 · utility

17Cited by

6References

39Claims

0Family size

Assignee

Marvell International Ltd. · BM

Inventors

Engling Yeo · San Jose, US
Eugene Pan · Milpitas, US
Henri Sutioso · Saratoga, US
Jun Xu · Longbeilingcun, CN
Shaohua Yang · Santa Clara, US
Panu Chaichanavong · Sunnyvale, US
Gregory Burd · San Jose, US
Zining Wu · Los Altos, US

Key dates

Filing date	Jul 11, 2007
Grant date	Aug 28, 2012
Priority date	—
Expiry date	Oct 29, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/1515
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A decoder system comprises a tensor-product code (TPC) decoder that decodes a received data stream to generate a decoded signal. A mark module that replaces low-density parity check (LDPC) parity bits of the decoded signal with 0s to generate a reset output signal. A deinterleave module deinterleaves error correction parity bits that are within the reset output signal to generate a deinterleaved signal that comprises a decoded portion and a concatenated portion. The concatenated portion comprises the error correction parity bits. A parity decoder module removes the concatenated portion from the deinterleaved signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.