Patent · US Active

Deep trench isolation structures and methods of formation thereof

US8258028B2 · kind B2 · utility

7Cited by

51References

19Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Armin Tilke · Beacon, US
Danny Pak-Chum Shum · Poughkeepsie, US
Laura Pescini · Dresden, DE
Ronald Kakoschke · Birkenfeld, DE
Karl Robert Strenz · Dresden, DE
Martin Stiftinger · Stockdorf, DE

Key dates

Filing date	Feb 9, 2010
Grant date	Sep 4, 2012
Priority date	—
Expiry date	Feb 9, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/76224
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Deep trench isolation structures and methods of formation thereof are disclosed. Several methods of and structures for increasing the threshold voltage of a parasitic transistor formed proximate deep trench isolation structures are described, including implanting a channel stop region into the bottom surface of the deep trench isolation structures, partially filling a bottom portion of the deep trench isolation structures with an insulating material, and/or filling at least a portion of the deep trench isolation structures with a doped polysilicon material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.