Method of fabricating metal-bearing integrated circuit structures having low defect density
US8258041B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2010 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | Jun 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating metal-bearing structures in an integrated circuit such as metal-polysilicon capacitors using conductive metal compounds. Defects due to organometallic polymers formed during the etch of a hard mask material are minimized by using a process that includes a plasma etch for the hard mask that achieves a predominantly chemical character using a fluorine-based etch chemistry. Using a low-temperature liquid-phase strip of the hard mask photoresist instead of an ash prevents further cross-linking of polymers formed during the plasma etch. Etching the metal-bearing material using a hot fully-concentrated mixture of ammonium hydroxide and hydrogen peroxide allows short etch times that are particularly shortened for tantalum nitride films deposited with a nitrogen concentration of about 30 percent or greater.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.