Self-timed write boost for SRAM cell with self mode control
US8259486B2 · kind B2 · utility
10Cited by
8References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2009 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | Jan 30, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A write boost circuit provides an automatic mode control for boost with different modalities with respect to the external supply voltage and also with respect to the extent of boost required at different process corners. The write boost circuit also takes care of the minimum boost provided to process corners with good writability where less boost is required. The boost is realized in terms of ground raising in the particular context and in general applicable to all other methods.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.