Hierarchy-based analytical placement method capable of macro rotation within an integrated circuit
US8261223B2 · kind B2 · utility
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Inventors
Key dates
| Filing date | Apr 25, 2011 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | May 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A placer produces a global placement plan specifying positions of cell instances and orientations of macros within an integrated circuit (IC) by initially clusterizing cell instances and macros to form a pyramidal hierarchy of blocks. Then the placer iteratively repeats the declusterization and routability improvement process from the highest level to the lowest level of the hierarchy. An objective function is provided in Cartesian coordinate for representing the position of each movable instance and in polar coordinate for representing the orientation of a macro relative to its the center. For each movable instance and each rotatable macro, its position or orientation is determined by conjugate gradient method to minimize total wire length. Finally, the placer uses a look-ahead legalization technique to rotate rotatable macros to legal orientations and move cell instances to legal positions in the end of global placement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.