Fabricating process of circuit substrate
US8261436B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Jan 12, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit substrate fabricating process includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block. In addition, a fabricating process for the circuit substrate is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.