Patent · US Active

Hybrid orientation accumulation mode GAA CMOSFET

US8264042B2 · kind B2 · utility

1Cited by
0References
18Claims
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Key dates

Filing dateFeb 11, 2010
Grant dateSep 11, 2012
Priority date
Expiry dateJun 23, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038

Abstract

A hybrid orientation accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Si(110) and n-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device results in high carrier mobility. Meanwhile polysilicon gate depletion and short channel effects are prevented, and threshold voltage is increased.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.