Column decoder for non-volatile memory devices, in particular of the phase-change type
US8264872B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2009 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Sep 30, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A column decoder is for a phase-change memory device provided with an array of memory cells, a reading stage for reading data contained in the memory cells, and a programming stage for programming the data. The column decoder selects and enables biasing of a bitline of the array and generates a current path between the bitline and the reading stage or, alternatively, the programming stage, respectively during a reading or a programming operation of the contents of the memory cells. In the column decoder, a first decoder circuit generates a first current path between the bitline and the reading stage, and a second decoder circuit, distinct and separate from the first decoder circuit, generates a second current path, distinct from the first current path, between the bitline and the programming stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.