Method for executing an instruction loop and a device having instruction loop execution capabilities
US8266414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2008 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Jul 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/381
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for managing a hardware instruction loop, the method includes: (i) detecting, by a branch prediction unit, an instruction loop; wherein a size of the instruction loop exceeds a size of a storage space allocated in a fetch unit for storing fetched instructions; (ii) requesting from the fetch unit to fetch instructions of the instruction loop that follow the first instructions of the instruction loop; and (iii) selecting, during iterations of the instruction loop, whether to provide to a dispatch unit one of the first instructions of the instruction loop or another instruction that is fetched by the fetch unit; wherein the first instructions of the instruction loop are stored at the dispatch unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.